Hardware Algorithms for Advanced Signal Processing and Control Applications
We explore by the way of an application example the design flow translating algorithms into optimized parallely/serially running hardware. Thereby, the laboratory-proprietary development platform GECKO serves as our research tool.
- Département HESB | Technique et informatique
- Pôle de recherche Human Centered Engineering
- Champ de recherche Human Centered Engineering
- Durée 01.01.2008 - 31.12.2008
- Direction du projet Josef Götte
Équipe du projet
- Partenaires - établissements de recherche, y c. BFH HESB | Technique et informatique
- Mots-clés signal processing, control, FPGA, computer arithemtics, GECKO, rapid-prototyping
Rudimentary CAD tools for the synthesis of algorithms in dedicated real-time hardware implementations are known in academic circles. These tools unfortunately do not yet solve important problems such as the mapping of floating-point algorithms onto fix-point hardware needed for optimized implementations. An additional challenge also remains the partitioning-problem of how to implement the algorithm into parallel and serial sub-circuits.
The project explores the theoretical background for the structured and optimized computer-based approach, together with the applied implementation, for the generation of dedicated hardware algorithms.
Hardware algorithms, miniaturization and chip design, sigma-delta algorithms, RFID technology, algorithms for biometry.
Concerning low-level implementation blocks we have devised a novel, fast and area-efficient hardware building block for arithmetic inversion: "An efficient Hardware Implementation for a Reciprocal Unit", The 5th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2010, Ho Chi Min City, Vietnam. Concerning the top-down design-flow we have implemented an MPC (model predictive controller) on the GECKO3 robot.
Our work on the top-down design-flow example clearly indicated the weaknesses of present tools. Our new research activity aims to improve system-on-chip design environments for rapid prototyping solutions.